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PID絕(jue)緣(yuan)測試儀(yi)(yi)（TOS7210S）是為準確(que)有效地對太(tai)陽能電池模塊的PID(Potential Induced Degradation)現象進行(xing)評(ping)估(gu)，以絕(jue)緣(yuan)電阻測試儀(yi)(yi)（TOS7200）為基礎(chu)設(she)計而成的測試儀(yi)(yi)。 
附有(you)極性切(qie)換功能，輸出(chu)電壓可(ke)(ke)達2000V,同時裝載了(le)n*分辨率的電流表，因此(ci)不僅可(ke)(ke)以(yi)(yi)(yi)進行PID評估，還可(ke)(ke)以(yi)(yi)(yi)用于要求進行高敏感度測試(shi)的絕緣體(ti)評估測試(shi)。標準安裝了(le)可(ke)(ke)從外部調用的面(mian)板存儲器及RS232C接口，因此(ci)也可(ke)(ke)以(yi)(yi)(yi)靈(ling)活對應自動(dong)化(hua)系統。
什么是PID現象？
PID現(xian)(xian)象(xiang)是(shi)指太陽(yang)能(neng)電(dian)(dian)(dian)(dian)(dian)池(chi)(chi)與(yu)邊框長(chang)期被施以(yi)高(gao)(gao)(gao)電(dian)(dian)(dian)(dian)(dian)壓(ya)，電(dian)(dian)(dian)(dian)(dian)池(chi)(chi)發電(dian)(dian)(dian)(dian)(dian)量顯(xian)著降低的(de)(de)(de)(de)現(xian)(xian)象(xiang)。目前認為(wei)所施加的(de)(de)(de)(de)電(dian)(dian)(dian)(dian)(dian)壓(ya)越(yue)高(gao)(gao)(gao)，越(yue)是(shi)在高(gao)(gao)(gao)溫、高(gao)(gao)(gao)濕的(de)(de)(de)(de)環境下劣化現(xian)(xian)象(xiang)越(yue)嚴重。如晶體硅太陽(yang)能(neng)電(dian)(dian)(dian)(dian)(dian)池(chi)(chi)模塊的(de)(de)(de)(de)輸出電(dian)(dian)(dian)(dian)(dian)壓(ya)即使只有(you)數(shu)十V，一旦直接連接的(de)(de)(de)(de)片數(shu)增加，串內(nei)(nei)的(de)(de)(de)(de)電(dian)(dian)(dian)(dian)(dian)位差(cha)將變得(de)非常高(gao)(gao)(gao)。一方面，PCS（Power Conditioning System）作(zuo)為(wei)交流(liu)電(dian)(dian)(dian)(dian)(dian)源與(yu)系(xi)(xi)統相(xiang)(xiang)連,使接地(di)(di)形態發生(sheng)(sheng)變化。輸入端采用浮接（一側電(dian)(dian)(dian)(dian)(dian)極不(bu)能(neng)接地(di)(di)線）的(de)(de)(de)(de)無(wu)變壓(ya)器(qi)方式近(jin)年有(you)所增加。這種(zhong)情況(kuang)下電(dian)(dian)(dian)(dian)(dian)池(chi)(chi)和地(di)(di)線間將發生(sheng)(sheng)高(gao)(gao)(gao)電(dian)(dian)(dian)(dian)(dian)位差(cha)。現(xian)(xian)在可明(ming)確的(de)(de)(de)(de)是(shi)，晶體硅太陽(yang)能(neng)電(dian)(dian)(dian)(dian)(dian)池(chi)(chi)模塊中(zhong)，相(xiang)(xiang)對于(yu)邊框（接地(di)(di)線）負極電(dian)(dian)(dian)(dian)(dian)位高(gao)(gao)(gao)的(de)(de)(de)(de)電(dian)(dian)(dian)(dian)(dian)池(chi)(chi)容(rong)易發生(sheng)(sheng)PID現(xian)(xian)象(xiang)。（請參照圖1）目前，日本國內(nei)(nei)以(yi)zui大600V、歐洲以(yi)zui大1000V的(de)(de)(de)(de)系(xi)(xi)統電(dian)(dian)(dian)(dian)(dian)壓(ya)運行太陽(yang)能(neng)電(dian)(dian)(dian)(dian)(dian)池(chi)(chi)模塊，但是(shi)目前出現(xian)(xian)了提高(gao)(gao)(gao)zui大系(xi)(xi)統電(dian)(dian)(dian)(dian)(dian)壓(ya)以(yi)削減企業用大規模太陽(yang)能(neng)發電(dian)(dian)(dian)(dian)(dian)系(xi)(xi)統的(de)(de)(de)(de)串數(shu)、PCS總(zong)數(shu)，提高(gao)(gao)(gao)發電(dian)(dian)(dian)(dian)(dian)效率的(de)(de)(de)(de)趨勢。 
圖2模擬了晶體硅(gui)太陽能電(dian)(dian)池模塊(kuai)(kuai)的(de)處(chu)(chu)于高電(dian)(dian)位差的(de)狀況(kuang)。邊框(kuang)為正極電(dian)(dian)位、模塊(kuai)(kuai)電(dian)(dian)路處(chu)(chu)于負*電(dian)(dian)位的(de)狀況(kuang)。目(mu)前認為是由(you)于超白鋼化玻璃內的(de)鈉離(li)子向電(dian)(dian)池側遷移而引起劣(lie)化。（薄(bo)膜(mo)太陽能電(dian)(dian)池模塊(kuai)(kuai)也被確認出現(xian)PID現(xian)象(xiang)，但(dan)是發生劣(lie)化的(de)機制與晶體硅(gui)太陽能電(dian)(dian)池模塊(kuai)(kuai)不同。）現(xian)在(zai)，各種研究機構正在(zai)通過(guo)研究、試驗查找(zhao)PID現(xian)象(xiang)的(de)原因(yin)。
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